Title:

6 month FPGA verification contract

Location:

Lancashire

Salary:

None specified

Description:

To join a very successful company to design testbenches for the verification and validation of both RTL code and digital subsystems. You must have experience designing, testing and debugging synthesizable VHDL code for complex FPGA designs and of testbench design with at least 3 years FPGA development experience with exposure to most aspects of the development life cycle, from specification of requirements to design, development, testing, and release.